Please use this identifier to cite or link to this item:
http://ir.juit.ac.in:8080/jspui/jspui/handle/123456789/9347
Full metadata record
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Samtani, Deepali | - |
dc.contributor.author | Patel, Naman Kumar | - |
dc.contributor.author | Gupta, Aditya | - |
dc.contributor.author | Jain, Shruti | - |
dc.date.accessioned | 2023-01-21T06:46:24Z | - |
dc.date.available | 2023-01-21T06:46:24Z | - |
dc.date.issued | 2015 | - |
dc.identifier.uri | http://ir.juit.ac.in:8080/jspui/jspui/handle/123456789/9347 | - |
dc.description.abstract | The Reversible Logic has received great attention in the past recent years due to its ability in reducing the power dissipation. Owing to its unique technique of one-to-one mapping between the inputs and the corresponding outputs, the reversible logic gates are now finding profound as well as promising applications in emerging growing fields such as digital signal processing, nanotechnology etc. The main purposes of designing reversible logic are to decrease quantum cost, depth of the circuits and the number of garbage outputs. We have successfully designed the universal gates (NAND and NOR) using reversible gates and irreversible logic and calculated the electrical parameters. Parameters with reversible logic are the best. | en_US |
dc.language.iso | en | en_US |
dc.publisher | Jaypee University of Information Technology, Solan, H.P. | en_US |
dc.subject | Irrevresible logic | en_US |
dc.subject | PSPICE | en_US |
dc.subject | Electrical parameters | en_US |
dc.subject | Universal gates | en_US |
dc.title | Design of Universal Gates Based on Reversible Logic | en_US |
dc.type | Article | en_US |
Appears in Collections: | Journal Articles |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
Design of Universal Gates Based on Reversible Logic.pdf | 302.93 kB | Adobe PDF | View/Open |
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.