Please use this identifier to cite or link to this item:
http://ir.juit.ac.in:8080/jspui/jspui/handle/123456789/9294| Title: | Optimization of drain current and voltage characteristics for DP4T double-gate RF CMOS switch at 45-nm technology |
| Authors: | Srivastava, Viranjay M. Yadav, K.S Singh, G. |
| Keywords: | 45-nm Nanotechnology Radio frequency CMOS VLSI |
| Issue Date: | 2012 |
| Publisher: | Jaypee University of Information Technology, Solan, H.P. |
| URI: | http://ir.juit.ac.in:8080/jspui/jspui/handle/123456789/9294 |
| Appears in Collections: | Journal Articles |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| Optimization of drain current and voltage characteristics for DP4T double-gate RF CMOS switch at 45-nm technology.pdf | 4.31 MB | Adobe PDF | View/Open |
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