Please use this identifier to cite or link to this item: http://ir.juit.ac.in:8080/jspui/jspui/handle/123456789/9249
Title: Design of Impedance Measurement Module for an EEG and EIT Integrated System
Authors: Sohal, Harsh
Karki, Bishal
Sharma, Anjali
Mohamadou, Youssoufa
Keywords: Electrical impedance tomography
Electroencephalogram
Impedance measurement module
Issue Date: 2018
Publisher: Jaypee University of Information Technology, Solan, H.P.
Abstract: Electrical impedance tomography (EIT) has been performed with the electroencephalogram (EEG) reduce errors associated with the inverse problem due to unknown conductivity distribution in the brain. EIT is known to have the potential to produce images for detecting brain activities e. g. epileptic seizures, as a means complementary to EEG. Since EEG signal is generated from internal sources in the brain and EIT voltage signal is induced from externally injected current, the measurement system requires high temporal resolution to measure fast EIT signals and high resolution ADC for small EEG signals in order to measure EEG signals concurrent with EIT signals. We proposed the new design of EEG and EIT integrated system based on multiple channels of upgraded impedance measurement module (IMM3). IMM3 has adopted a direct digital synthesizer (DDS) to generate injection current. Using internal PLL, we could generate fast acquisition timing signal for EIT measurement. We used a 24 bit ADC with 2.5 MSPS measurement speed. Real and imaginary components of EIT signal could be calculated by the phase sensitive demodulation or FFT method. EEG data was decimated to improve the signal quality and to reduce the amount of data to be recorded. Other features were inherited from previous impedance measurement module (IMM2.5) including operation mode for external triggering and cascaded connection with EIT systems, the selfcalibration to maintain the performance, multiplexing, and phase sensitive demodulation. This document describes the design of the IMM3 for EEG and EIT integrated system in detail and presents the basic performance indices of tested module. It can be assembled to configure a multi-channel EEG and EIT integrated system.
URI: http://ir.juit.ac.in:8080/jspui/jspui/handle/123456789/9249
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