PVT Variability Check on UCM  Architectures at Extreme  Temperature-Process Changes

Please use this identifier to cite or link to this item: http://ir.juit.ac.in:8080/jspui/jspui/handle/123456789/8250

Full metadata record

DC Field	Value	Language
dc.contributor.author	Sarma, Rajkumar	-
dc.contributor.author	Bhargava, Cherry	-
dc.contributor.author	Jain, Shruti	-
dc.date.accessioned	2022-11-09T10:37:10Z	-
dc.date.available	2022-11-09T10:37:10Z	-
dc.date.issued	2020	-
dc.identifier.uri	http://ir.juit.ac.in:8080/jspui/jspui/handle/123456789/8250	-
dc.description.abstract	The UCM (universal compressor-based multiplier) architecture promises to provide faster multiplication operation in supply voltage as low as 0.6 V. The basic component of UCM architecture is a universal compressor architecture that replaces the conventional Wallace tree algorithm. To extend the work fur ther, in this chapter, a detailed PVT (process-voltage-temperature) analysis is performed using Cadence Virtuoso 90nm technology. The analysis shows that the delay of the UCM has reduced more significantly than the Wallace tree algorithm at extreme process, voltage, and temperature	en_US
dc.language.iso	en	en_US
dc.publisher	IGI Global	en_US
dc.subject	PVT Variability	en_US
dc.subject	UCM Architectures	en_US
dc.title	PVT Variability Check on UCM Architectures at Extreme Temperature-Process Changes	en_US
dc.type	Book chapter	en_US
Appears in Collections:	Book Chapters

Files in This Item:

File	Description	Size	Format
PVT Variability Check on UCM Architectures at Extreme Temperature-Process Changes.pdf		315.09 kB	Adobe PDF	View/Open