Scaling Of Mosfet And Improving It’s Characteristics

Abstract

Today the demand is for high density and integrated circuits. This is achieved by increasing the number of transistors per chip. And for increasing the number of transistors, we need to scale the MOSFET. By scaling we mean miniaturizing its size. We have discussed the effect of scaling on initial device characteristics, the limits imposed by reliability concerns in scaled-down MOSFET technologies. Since we know that MOSFET is the most efficient transistor of them all, we have worked upon to decrease its size to meet the growing demand for compact, faster and more efficient devices. We encounter several problems associated with this process one of them being Short Channel Effects (SCE) where the MOSFET behave differently from its normal operation. So in order to overcome this undesired outcome we have proposed a new model of Dual gate MOSFET (DG MOSFET). For analyzing and optimizing the performance of DG MOSFET we have simulated and fabricated the same in Microwind 3.1 and NI Multisim.