Globally Asynchronous and Locally Synchronous

Abstract

This report addresses the aspect of designing on-chip communication network. This is about applying Globally-Asynchronous Locally-Synchronous (GALS) communication scheme into Network-on-Chip (NoC). GALS scheme is applied in the NoC designs presented in this report by applying synchronous style in the communications between network nodes and their attached function hosts while applying asynchronous style in the communication among network nodes. The Network-on-Chip (NoC) concept has recently become a widely discussed technique for handling the large on-chip communication requirements of complex System-on-Chip (SOC) designs. A traditional bus-based interconnection scheme does not scale well to very large SOCs because many Intellectual Property (IP) blocks must contend with each other to communicate over the shared bus. In contrast, an on-chip network uses the packet-switching paradigm to route information between IP blocks and it can be scaled up to achieve a very large total aggregate bandwidth within the chip.