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DC Field | Value | Language |
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dc.contributor.author | Samtani, Deepali | - |
dc.contributor.author | Patel, Naman Kumar | - |
dc.contributor.author | Gupta, Aditya | - |
dc.date.accessioned | 2022-08-18T11:16:30Z | - |
dc.date.available | 2022-08-18T11:16:30Z | - |
dc.date.issued | 2015 | - |
dc.identifier.uri | http://ir.juit.ac.in:8080/jspui//xmlui/handle/123456789/5886 | - |
dc.description.abstract | The Reversible Logic has received great attention in the past recent years due to its ability in reducing the power dissipation. Owing to its unique technique of one-to-one mapping between the inputs and the corresponding outputs, the reversible logic gates are now finding profound as well as promising applications in emerging growing fields such as Digital Signal Processing, Nanotechnology etc. The implementation of these logic circuits into electronic circuitry is based on CMOS Technology. Reversible logic is one of the most vital issue at present time and it has different areas for its application, those are low power CMOS, quantum computing, nanotechnology, cryptography, digital signal processing (DSP), communication, computer graphics etc. It is not possible to realize these applications without implementation of reversible logic. The main purposes of designing reversible logic are to decrease quantum cost, depth of the circuits and the number of garbage outputs. The reversible circuits form the basic building block of quantum computers as all quantum operations are reversible. In Reversible logic, designs of reversible circuits are presented that are optimized for the number of reversible gates and the garbage outputs. The optimization of the number of reversible gates is not sufficient since each reversible gate is of different computational complexity, and thus will have a different quantum cost and delay. While the computational complexity of a reversible gate can be measured by its quantum cost, the delay of a reversible gate is another parameter that can be optimized during the design of a reversible circuit. | en_US |
dc.language.iso | en | en_US |
dc.publisher | Jaypee University of Information Technology, Solan, H.P. | en_US |
dc.subject | Reversible logic | en_US |
dc.subject | Digital circuits | en_US |
dc.subject | Digital signal processing | en_US |
dc.subject | Complementary metal-oxide semiconductor | en_US |
dc.title | Design of Digital Circuits Based on Reversible Logic | en_US |
dc.type | Project Report | en_US |
Appears in Collections: | B.Tech. Project Reports |
Files in This Item:
File | Description | Size | Format | |
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Design of Digital Circuits Based on Reversible Logic.pdf | 2.5 MB | Adobe PDF | View/Open |
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