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Please use this identifier to cite or link to this item: http://ir.juit.ac.in:8080/jspui/jspui/handle/123456789/11303
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dc.contributor.authorJain, Manas-
dc.contributor.authorSaksham-
dc.contributor.authorJain, Shruti [Guided by]-
dc.date.accessioned2024-08-01T11:09:05Z-
dc.date.available2024-08-01T11:09:05Z-
dc.date.issued2024-
dc.identifier.urihttp://ir.juit.ac.in:8080/jspui/jspui/handle/123456789/11303-
dc.descriptionSP2024184 [Enrollment No. 201017, 201004]en_US
dc.language.isoen_USen_US
dc.publisherJaypee University of Information Technology, Solan, H.P.en_US
dc.subjectFPGAen_US
dc.subjectPowet-efficient multiplieren_US
dc.titleFPGA Implementation of Powet-Efficient Multiplieren_US
dc.typeProject Reporten_US
Appears in Collections:B.Tech. Project Reports

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