Please use this identifier to cite or link to this item:
http://ir.juit.ac.in:8080/jspui/jspui/handle/123456789/11303| Title: | FPGA Implementation of Powet-Efficient Multiplier |
| Authors: | Jain, Manas Saksham Jain, Shruti [Guided by] |
| Keywords: | FPGA Powet-efficient multiplier |
| Issue Date: | 2024 |
| Publisher: | Jaypee University of Information Technology, Solan, H.P. |
| Description: | SP2024184 [Enrollment No. 201017, 201004] |
| URI: | http://ir.juit.ac.in:8080/jspui/jspui/handle/123456789/11303 |
| Appears in Collections: | B.Tech. Project Reports |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| FPGA Implementation of Powet-Efficient Multiplier.pdf | 4.64 MB | Adobe PDF | View/Open |
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